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THREE_LANE_PROJECTED_ARCHITECTURAL_REGISTER_BITS

Constant THREE_LANE_PROJECTED_ARCHITECTURAL_REGISTER_BITS 

Source
pub const THREE_LANE_PROJECTED_ARCHITECTURAL_REGISTER_BITS: usize = _; // 154_578usize
Expand description

Total projected architectural register bits in the full farm.

This is the arithmetic sum of the pipeline, pointer, and registered-memory output fields authored in RHDL. It must not be reported as FPGA utilization.